A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparator

Takaaki Ito, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada. A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparator. In 24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017, Batumi, Georgia, December 5-8, 2017. pages 1-4, IEEE, 2017. [doi]

Abstract

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