Table of Contents

• A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparatorTakaaki Ito, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada. 1-4 [doi]
• A low-power comparator-reduced flash ADC using dynamic comparatorsHasan Molaei, Khosrow Hajsadeghi. 5-8 [doi]
• Digital correction of mismatches in time-interleaved ADCs for digital-RF receiversTomoya Takahashi, Takao Kihara, Tsutomu Yoshimura. 9-12 [doi]
• An 8 bits 2GS/s ADC in 180 nm CMOS process for healthcare multichannel instrumentsGabriel Puech. 13-16 [doi]
• Analysis of the settling behavior of an external reference voltage source for a 16 bit and 200MS/s pipeline analog-to-digital converterRobert Loehr, Leon Bender, Juergen Roeber, Frank Ohnhaeuser, Robert Weigel. 17-20 [doi]
• Matrix single stage distributed amplifier design for ultra wideband applicationTemitope Odedeyi, Izzat Darwazeh. 21-25 [doi]
• A 60-90GHz stagger-tuned low-noise amplifier with 1.2dBm OP1dB in 65nm CMOSAdemola Mustapha, Ayman Shabra. 26-29 [doi]
• A novel method to design broadband flat gain and sufficiently efficient power amplifiers using real frequency techniqueSedat Kilinc, B. Siddik Yarman. 30-33 [doi]
• Doherty CMOS power amplifiers for 5G technologyNourhan Elsayed, Hani H. Saleh, Baker Mohammad, Mohammed Ismail. 34-37 [doi]
• UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAsJulia Casarin Puget, Andre Saldanha Oliveira, Jorge Seelen, Ricardo Reis. 38-41 [doi]
• A post-processing methodology to improve the automatic design of CMOS gates at layout-levelGustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa. 42-45 [doi]
• Construction of coverage data for post-silicon validation using big data techniquesEman El Mandouh, A. Gamal, A. Khaled, T. Ibrahim, Amr G. Wassal, Elsayed Hemayed. 46-49 [doi]
• Smart auto-correction methodology using assertions and dynamic partial reconfigurationKhaled Salah, Mohamed AbdElSalam. 50-53 [doi]
• TiO2 memristor model-based chaotic oscillatorFakhreddine Zayer, Wael Dghais, Belgacem Hamdi. 54-57 [doi]
• A novel secure conference communication in IoT devices based on memristorsHeba Abunahla, Dina Shehada, Chan Yeob Yeun, Baker Mohammad, Thanos Stouraitis. 58-61 [doi]
• Hybrid memristor-CMOS based linear feedback shift register designAbubaker Sasi, Amirali Amirsoleimani, Arash Ahmadi, Majid Ahmadi. 62-65 [doi]
• Coexistence of attractors in the parallel inductor-capacitor-memristor circuitZbigniew Galias. 66-69 [doi]
• A case study on dynamic control of complex operational amplifier performance using back gate biasingBangalore Ramesh Akshay Agash, Elmar Herze, Johann Haue. 70-73 [doi]
• A fully-differential operational amplifier using a new chopping technique and low-voltage input devicesTimo Mai, Konstantin Schmid, Jürgen Röber, Amelie Hagelauer, Robert Weigel. 74-77 [doi]
• Method for speeding the micropower CMOS operational amplifiers with dual-input-stagesN. N. Prokopenk, N. V. Butyrlagi, A. V. Bugakov, A. A. Ignashi. 78-81 [doi]
• A case study on dynamic control of complex operational amplifier performance using back gate biasingBangalore Ramesh Akshay Agashe, Elmar Herzer, Johann Hauer. 82-85 [doi]
• Low-voltage low-distortion sampling switch design in 22 nm FD-SOI CMOS technologyPragoti Pran Bora, David Borggreve, Frank Vanselow, Erkan Isa, Linus Maurer. 86-89 [doi]
• Multiband and concurrent matching network design via brune sectionsSerkan Yildiz, Ahmet Aksen, B. Siddik Yarman. 90-93 [doi]
• The ARC-HPF with independent trimming of the main characteristicsD. Yu. Denisenko, Yu. I. Ivanov, N. N. Prokopenko. 94-97 [doi]
• A concurrent multiband fully differential CMOS LNA with a local active feedback for cellular applications 3G-4GHakan Cetinkaya, Tufan Coskun Karalar, B. Siddik Yarman. 98-102 [doi]
• Design of 0-15GHz band 180 degree digital phase shifting cell topologyCelal Avci, Ece Olcay Gunes, Binboga Siddik Yarman. 103-106 [doi]
• SPICE simulation of ferrite core losses and hot spot temperature estimationShmuel Ben-Yaakov. 107-110 [doi]
• Application specific design for digital beam-former (DBF)Ahood Al Jneibi, Menatalla Abououf, Hani H. Saleh, Lilas Alrahis, Tasneem Assaf, Thanos Stouraitis. 111-115 [doi]
• The assessment of the antenna circuit of a RF wheel unitEmil Lazarescu, Florin Alexa, Doru Vatau, Flaviu-Mihai Frigura-Iliasa. 116-119 [doi]
• Design considerations for near to the ground communication system and associated Sub-GHz low profile antennaVadi Su Yilmaz, Gulsima Bilgin, Elif Aydin, Ali Kara. 120-123 [doi]
• Automatic sensitivity analysis tool for analog active filterAmin Sallem, Pedro Pereira, Mourad Fakhfakh. 124-127 [doi]
• Learning and real-time classification of hand-written digits with spiking neural networksShruti R. Kulkarni, John M. Alexiades, Bipin Rajendran. 128-131 [doi]
• Low power neuromorphic hardware based multi-modal authentication systemShridu Verma, Narayani Bhatia, Salam Thoi Thoi Singh, Manan Suri. 132-135 [doi]
• On reconfigurable fabrics for intelligent hardware systemsOmar Eldash, Kasem Khalil, Magdy Bayoumi. 136-139 [doi]
• Hand gesture classification using inertial based sensors via a neural networkErhan Akan, Hakan Tora, Baran Uslu. 140-143 [doi]
• Subset selection for tuning of hyper-parameters in artificial neural networksK. K. Emre Aki, Tugba Erkoc, M. Taner Eski. 144-147 [doi]
• A new current mode implementation of the reconfigurable analog baseband low pass filter with cell-based variable transconductance amplifierErsin Alaybeyoglu, Hakan Kuntman. 148-151 [doi]
• 0.5-V bulk-driven quasi-floating gate transconductance amplifierMontree Kumngern, Usa Torteanchai, Fabian Khateb. 152-155 [doi]
• Design of integer/fractional-order filter with electronically reconfigurable transfer responseRoman Sotner, Norbert Herencsar, Jan Jerabek, Jiri Petrzela, Tomás Dostál. 156-159 [doi]
• Novel Ms⁁2 type FDNR simulation configuration with electronic control and grounded capacitancesDinesh Prasad, Mayank Srivastava. 160-164 [doi]
• Integrator with p-channel depletion MOS switchHuseyin Ozgur Kazanci. 165-169 [doi]
• Evaluation of NoC on multi-FPGA interconnection using GTX transceiverAtef Dorai, Olivier Sentieys, Hélène Dubois. 170-173 [doi]
• FPGA-based implementation of a frequency spreading FBMC-OQAM baseband modulatorMiguel Carvalho, Mário Lopes Ferreira, João Canas Ferreira. 174-177 [doi]
• Efficient FPGA implementation of probabilistic gallager B LDPC decoderFakhreddine Ghaffari, Burak Unal, Ali Akoglu, Khoa Le, David Declercq, Bane Vasic. 178-181 [doi]
• HLTB design for high-speed multi-FPGA pipelinesJosef Magri, Owen Casha, Keith Bugeja, Ivan Grech, Edward Gatt. 182-185 [doi]
• A cell clustering technique to reduce transistor countCalebe Conceicao, Gisell Moura, Filipe Pisoni, Ricardo Reis. 186-189 [doi]
• Capacitive sensor technology for soil moisture monitoring networksM. J. W. Schubert, S. Seign, Q. Dai, S. Hinterseer, F. Pielmeier, A. Pietsch, C. Seebauer, J. Weis, C. Yu, S. Zenger. 190-193 [doi]
• Supplementary MOS-only butterworth LP BP filter circuitsOguzhan Cicekoglu, Norbert Herencsar, Bilgin Metin. 194-197 [doi]
• Challenges for fully-integrated resonant switched capacitor converters in CMOS technologiesYasser Moursy, Anthony Quelen, Gaël Pillonnet. 198-201 [doi]
• Simplified sympes codec with positive DC offsetB. Siddik Yarman, O. Korkmaz, M. Temizyurek, F. Ince, B. Hassoy, H. Canberi, E. Ceren, E. Gultekin. 202-205 [doi]
• Study of two-memristor circuit model with explicit composition methodDenis N. Butusov, Valerii Y. Ostrovskii, Alexander V. Zubarev. 206-209 [doi]
• Stochastic bifurcation in generalized chua's circuit through alpha-stable levy noiseFerit Acar Savaci, Serpil Yilmaz. 210-213 [doi]
• Stochastic deep learning in memristive networksAnakha V. Babu, Bipin Rajendran. 214-217 [doi]
• A CMOS programmable phase shifter for compensating synchronous detection bioimpedance systemsPanagiotis Kassanos, Guang-Zhong Yang. 218-221 [doi]
• Nonlinear modeling and analysis of buck converter using volterra seriesHitesh Shrimali, Vijender Kumar Sharma, Jai Narayan Tripathi, Rakesh Malik. 222-226 [doi]
• Sampling based random number generator for stochastic computingM. Burak Karadeniz, Mustafa Altun. 227-230 [doi]
• An ultra-wide-range fine-resolution two-step time-to-digital converter with built-in foreground coarse gain calibrationRyuichi Enomoto, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada. 231-234 [doi]
• A low phase noise CMOS oscillator with tail current-shaping technique in wireless implantable SoC applicationsAmir Mahdavi, Mehdi Nasrollahpour, Sotoudeh Hamedi-Hagh, Mohammad Shams Esfand Abadi. 235-238 [doi]
• A robust and low-power synchronization technique of coarse-and-fine conversion parts in ring-oscillator-based time-to-digital convertersTakayuki Okazawa, Ippei Akita. 239-242 [doi]
• On the jitter-to-fast-clock-period ratio in oscillator-based true random number generatorsEduardo Bejar, Julio Saldana, Erick Raygada, Carlos Silva. 243-246 [doi]
• Performance analysis of the energy efficient clustering models in wireless sensor networksSercan Vancin, Ebubekir Erdem. 247-251 [doi]
• XGT4: An industrial grade, open source tester for multi-gigabit networksLeonardo Rezende Juracy, Felipe B. Lazzarotto, Daniel V. Pigatto, Ney Laert Vilar Calazans, Fernando Gehm Moraes. 252-255 [doi]
• A novel time-slot assignment method in fully mesh networksOmer Aydin, Tugrul Akyuz. 256-259 [doi]
• Spur reduction by self-injection loop in a fractional-N PLLMayu Kobayashi, Yuya Masui, Takao Kihara, Tsutomu Yoshimura. 260-263 [doi]
• Efficient polynomial regression algorithm for LTE turbo decodingMostafa A. Foda, Mohamed A. Abd El ghany, Klaus Hoffman. 264-269 [doi]
• Temperature dependence and ZTC bias point evaluation of sub 20nm bulk multigate devicesYgor Q. Aguiar, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis. 270-273 [doi]
• Design and implication of a rule based weight sparsity module in HTM spatial poolerTimur Ibrayev, Olga Krestinskaya, Alex Pappachen James. 274-277 [doi]
• The art of extracting circuit transfer functions with SuTra analysesSotoudeh Hamedi-Hagh. 278-281 [doi]
• SET response of FinFET-based majority voter circuits under work-function fluctuationY. Q. de Aguiar, Fernanda Lima Kastensmidt, Cristina Meinhardt, Ricardo A. L. Reis. 282-285 [doi]
• Analytical modeling of transconductance in organic thin-film transistorsSeyed Ali Sedigh Ziabari, Reza Meshkin. 286-289 [doi]
• Impact of schmitt trigger inverters on process variability robustness of 1-Bit full addersSamuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis, Cristina Meinhardt. 290-293 [doi]
• Comparing 32nm full adder TMR and DTMR architecturesGiane Ulloa, Vinicius Lucena, Cristina Meinhardt. 294-297 [doi]
• Exploring the use of parallel prefix adder topologies into approximate adder circuitsMorgana Macedo, Leonardo Bandeira Soares, Bianca Silveira, Cláudio Machado Diniz, Eduardo A. C. da Costa. 298-301 [doi]
• Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementationAndre N. Sapper, Leonardo Bandeira Soares, Eduardo Costa, Sergio Bampi. 302-305 [doi]
• Assessment of seven reconstruction methods for contemporary compressive sensingHamza Al Maharmeh, Hani H. Saleh, Baker Mohammad, Mohammad Ismail, Thanos Stouraitis. 306-309 [doi]
• A low-power, high-resolution, 1 GHz differential comparator with low-offset and low-kickbackMuhammad Aldacher, Mehdi Nasrollahpour, Sotoudeh Hamedi-Hagh. 310-313 [doi]
• Hardening C-elements against metastabilityLeandro S. Heck, Matheus T. Moreira, Ney Laert Vilar Calazans. 314-317 [doi]
• A triangular active charge injection scheme using a resistive current for resonant power supply noise suppressionMasahiro Kano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada. 318-321 [doi]
• Compact first order temperature-compensated CMOS current referenceDmitry Osipov 0001, Steffen Paul. 322-325 [doi]
• Digital FCS-MP control of an AC-DC power converter to improve dynamic responseAbdolsamad Hamidi, Shahram Karimi, Arash Ahmadi, Majid Ahmadi. 326-329 [doi]
• Self-healing router architecture for reliable network-on-chipsKasem Khalil, Omar Eldash, Magdy Bayoumi. 330-333 [doi]
• A 65nm ASIC design for measuring mental stress from the heart rate variationsHuda Goian, Aamna Alali, Temesghen Habte, Hani H. Saleh. 334-338 [doi]
• CAR: On the highway towards de-synchronizationFrançois Bertrand, Abdelkarim Cherkaoui, Jean Simatic, Anthony Maure, Laurent Fesquet. 339-343 [doi]
• An aging-aware model for the leakage power of nanoscaled digital integrated circuits in IoT eraAmirhossein Moshrefi, Hossein Aghababa, Omid Shoaei. 343-346 [doi]
• Optimization and hardware implementation of image watermarking for low cost applicationsKonstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros. 347-350 [doi]
• Effect of secret image transformation on the steganography processMohamed Buke, Hakan Tora, Erhan Gokcay. 351-355 [doi]
• Reversible watermarking in medical imaging with zero distortion in ROIAles Rocek, Michal Javorník, Karel Slávicek, Otto Dostál. 356-359 [doi]
• An intelligent readout integrated circuit (iROIC) with on-chip local gradient operationsJavier E. Soto, Wladimir E. Valenzuela, Silvana Diaz, Antonio Saavedra, Miguel Figueroa, Javad Ghasemi, Payman Zarkesh-Ha. 360-362 [doi]
• Modular evaluation system for low-power applications: Educating undergraduate students in advanced digital designAndrea Schwandt, Marco Winzker. 364-367 [doi]
• 2, 0.11Hz, 4.5pW gate leakage timer using differential leakage technique in 55nm DDC CMOS for small-footprint, low-frequency and low-power timing generationYuya Nishio, Atsuki Kobayashi, Kiichi Niitsu. 368-371 [doi]
• The implementation of a successive cancellation polar decoder on Xilinx System GeneratorA. Cagri Arli, Ayse Colak, Orhan Gazi. 372-376 [doi]
• Level-shifted neural encoded analog-to-digital converterAigerim Tankimanova, Akshay Kumar Maan, Alex Pappachen James. 377-380 [doi]
• Go functional model for a RISC-V asynchronous organisation - ARVMarcos L. L. Sartori, Ney Laert Vilar Calazans. 381-384 [doi]
• A 5.9 GHz RF rectifier for wireless power transmission applicationsMariem Kanoun, David Cordeau, Jean-Marie Paillot, Hassène Mnif, Mourad Loulou. 385-388 [doi]
• Adaptive face space models with dynamic neural priors and sparse codingSamira Reihanian, Amin Zollanvari, Alex Pappachen James. 389-392 [doi]
• Investigating parallel TMR approaches and thread disposability in LinuxGennaro Severino Rodrigues, Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis, Luciano Ost. 393-396 [doi]
• Medical images protection and authentication using hybrid DWT-DCT and SHA256-MD5 hash functionsAlavi Kunhu, Hussain Al-Ahmad, Fatma Taher. 397-400 [doi]
• Analysis of neural activity from EEG data based on EMD frequency bandsMaximiliano Bueno-Lopez, Eduardo Giraldo, Marta Molinas. 401-405 [doi]
• A scalable time-domain biosensor array using a capacitor-less CMATC and logarithmic cyclic time-attenuation-based TDC with discharge acceleration for high-spatial-resolution bio-imagingKei Ikeda, Atsuki Kobayashi, Kiichi Niitsu. 406-409 [doi]
• A 115V bi-phasic pulse electrical muscle stimulator by using inductor-sharing dual-output boost converter with supply-stepping switch driverAtit Tamtrakarn. 410-413 [doi]
• Automatic detection of coronary artery disease (CAD) in an ECG signalAyesha AlHosani, Sara AlShizawi, Shayma AlAli, Hani H. Saleh, Tasneem Assaf, Thanos Stouraitis. 414-418 [doi]
• A new bio-implantable transmitter topology for minimizing the antenna effectsMojtaba Daliri. 419-422 [doi]
• Research of peak detector limiting characteristics for analog interface in impedance spectroscopy systemsLeontiy K. Samoilov, Evgeniy A. Zhebrun, Nikolay N. Prokopenko, Petr S. Budyakov. 423-426 [doi]
• A low-voltage hysteresis comparator for low power applicationsTakumi Saito, Satoshi Komatsu. 427-430 [doi]
• RF energy harvesting system and circuits for charging of wireless devices using spectrum sensingNaser Ahmadi Moghaddam, Alireza Maleki, Mehdi Shirichian, Navid Shahbazi Panah. 431-436 [doi]
• A framework for system level low power design space explorationAmeni Ben Mrad, Michel Auguin, François Verdier, Amal Ben Ameur. 437-441 [doi]
• A CMOS MPPT power conditioning circuit for energy harvestersFrancarl Galea, Owen Casha, Ivan Grech, Edward Gatt, Joseph Micallef. 442-445 [doi]
• Characterization of RF energy harvesting at 2.4 GHzHadeel Aboueidah, Nasma Abbas, Nadeen El Nachar, Aya Al-Yousef, Mohammad Alhawari, Baker Mohammad, Hani H. Saleh, Tasneem Assaf, Mohammed Ismail. 446-449 [doi]
• The application of multi-valued logic elements "minimum" and "maximum" for processing current signals of sensorsNikolay I. Chernov, Nikolay N. Prokopenko, Vladislav Y. Yugai, Nikolay V. Butyrlagin. 450-453 [doi]
• A MEMS low-IF IQ-mixer in metal MUMPs: Modelling and simulationJeremy Scerri, Ivan Grech, Edward Gatt, Owen Casha. 454-457 [doi]
• Design of broadband microwave power amplifiers via Fettweis representation of brune functionsB. Siddik Yarman. 454-457 [doi]
• Arbitrary generation of phase shift by pseudodifferential bilinear sections and their applicationRoman Sotner, Jan Jerabek, Jiri Petrzela, Norbert Herencsar, Roman Prokop, Tomás Dostál. 458-461 [doi]
• In memory of Tamás Roska (1940-2014)Péter Szolgay. 458-459 [doi]
• "Professor of professors" Yılmaz Tokad: "I have always loved academic life": An interview by Erol Sezer, Ph.DErol Sezer. 460-464 [doi]
• All-digital 1550 nm optical aqueous glucose solution measurement systemVolkan Turgul, Izzet Kale. 462-465 [doi]
• Radoslav Horvat and Mirko Milić, founders of circuit theory in former YugoslaviaLjiljana Milic, Ljiljana Trajkovic. 465-468 [doi]
• Application-specific processor for local-binary-patterns generationBilal Taha, Lilas Alrahis, Tasneem Assaf, Hani H. Saleh, Naoufel Werghi, Thanos Stouraitis. 466-469 [doi]
• System-on-a-chip (SoC)-based hardware acceleration for extreme learning machineAmin Safaei, Q. M. Jonathan Wu, Yimin Yang, Akilan Thangarajah. 470-473 [doi]
• A VCO-free low-power fully digital BPSK demodulator for implantable biomedical microsystemsMahdi Hosseinnejad, Abbas Erfanian. 474-477 [doi]
• Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliersLeandro M. G. Rocha, Guilherme Paim, Rafael S. Ferreira, Eduardo Costa, Sérgio Bampi. 478-481 [doi]
• Improved goldschmidt algorithm for fast and energy-efficient fixed-point dividerGuilherme Paim, Pedro Marques, Eduardo Costa, Sérgio J. M. de Almeida, Sergio Bampi. 482-485 [doi]
• Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensorsGustavo M. Santana, Guilherme Paim, Leandro M. G. Rocha, Renato Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa, Sergio Bampi. 486-489 [doi]
• Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encodingBianca Silveira, Brunno Abreu, Guilherme Paim, Mateus Grellert, Rafael S. Ferreira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi. 490-493 [doi]
• The design of memristor based high pass filter circuitMuhammet Emin Sahin, Hasan Guler. 494-497 [doi]
• An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvestingTakanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa. 498-501 [doi]
• A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvestingYuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa. 502-505 [doi]
• Aging aware safe operating area investigation of switching converter output stages through 2D plotsEngin Afacan, Kemal Ozanoglu, Merve Toka. 506-509 [doi]
• Linear feedback in nonlinear circuitsZhenlong Xiao. 510-513 [doi]
• An energy-efficient FPGA-based matrix multiplierYiyu Tan, Toshiyuki Imamura. 514-517 [doi]
• Instruction-level programming approach for very long instruction word digital signal processorsTomas Fryza, Roman Mego. 518-521 [doi]
• Exploiting absolute arithmetic for power-efficient sum of absolute differencesBrunno Abreu, Guilherme Paim, Mateus Grellert, Bianca Silveira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi. 522-525 [doi]
• Physical implementation of an ASIC-oriented SRAM-based viterbi decoderLeandro M. G. Rocha, Guilherme Paim, Gustavo M. Santana, Brunno A. Abreu, Rafael Ferreira, Eduardo A. C. da Costa, Sergio Bampi. 526-529 [doi]
• Co-verification design flow for HDL languages: A complete development methodologyLaurent Beaulieu, Olivier Weppe, Benoit Le Ludec, Florian Lebeau. 530-533 [doi]
• Yield analysis of nano-crossbar arrays for uniform and clustered defect distributionsOnur Tunali, Mustafa Altun. 534-537 [doi]
• Design of a high gain telescopic-cascode operational amplifier based on the ZTC operation conditionLida Kouhalvandi, Sercan Aygün, Ece Olcay Günes, Mürvet Kirci. 538-541 [doi]
• An improved 2 stage opamp with rail-to-rai! gain-boosted folded cascode input stage and monticelli rail-to-rail class AB output stageLida Kouhalvandi, Sercan Aygün, Ece Olcay Günes, Mürvet Kirci. 542-545 [doi]