Hiroki Ito, Mitsuru Shiozaki, Anh Tuan Hoang, Takeshi Fujino. Efficient DPA-Resistance Verification Method with Smaller Number of Power Traces on AES Cryptographic Circuit. In 15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012. pages 735-738, IEEE, 2012. [doi]
@inproceedings{ItoSHF12,
title = {Efficient DPA-Resistance Verification Method with Smaller Number of Power Traces on AES Cryptographic Circuit},
author = {Hiroki Ito and Mitsuru Shiozaki and Anh Tuan Hoang and Takeshi Fujino},
year = {2012},
doi = {10.1109/DSD.2012.46},
url = {http://dx.doi.org/10.1109/DSD.2012.46},
researchr = {https://researchr.org/publication/ItoSHF12},
cites = {0},
citedby = {0},
pages = {735-738},
booktitle = {15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012},
publisher = {IEEE},
isbn = {978-1-4673-2498-4},
}