Hiroki Ito, Mitsuru Shiozaki, Anh Tuan Hoang, Takeshi Fujino. Efficient DPA-Resistance Verification Method with Smaller Number of Power Traces on AES Cryptographic Circuit. In 15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012. pages 735-738, IEEE, 2012. [doi]
Abstract is missing.