Hierarchical 3D interconnection architecture with tightly-coupled processor-memory integration

Kiyoto Ito, Makoto Saen, Kenichi Osada, Tomoyuki Kodama, Hiroyuki Mizuno. Hierarchical 3D interconnection architecture with tightly-coupled processor-memory integration. In IEEE International Conference on 3D System Integration, 3DIC 2010, Munich, Germany, 16-18 November 2010. pages 1-6, IEEE, 2010. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.