Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs

Kiyoo Itoh, Riichiro Takemura. Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs. In 14th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2007, Marrakech, Morocco, December 11-14, 2007. pages 739-742, IEEE, 2007. [doi]

Abstract

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