Hiroshi Iwai. CMOS Scaling for sub-90 nm to sub-10 nm. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 30, IEEE Computer Society, 2004. [doi]
@inproceedings{Iwai04,
title = {CMOS Scaling for sub-90 nm to sub-10 nm},
author = {Hiroshi Iwai},
year = {2004},
url = {http://csdl.computer.org/comp/proceedings/vlsid/2004/2072/00/20720030abs.htm},
researchr = {https://researchr.org/publication/Iwai04},
cites = {0},
citedby = {0},
pages = {30},
booktitle = {17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2072-3},
}