Kenichi Iwata, Seiji Mochizuki, Motoki Kimura, Tetsuya Shibayama, Fumitaka Izuhara, Hiroshi Ueda, Koji Hosogi, Hiroaki Nakata, Masakazu Ehama, Toru Kengaku, Takuichiro Nakazawa, Hiromi Watanabe. A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS. J. Solid-State Circuits, 44(4):1184-1191, 2009. [doi]
@article{IwataMKSIUHNEKN09,
title = {A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS},
author = {Kenichi Iwata and Seiji Mochizuki and Motoki Kimura and Tetsuya Shibayama and Fumitaka Izuhara and Hiroshi Ueda and Koji Hosogi and Hiroaki Nakata and Masakazu Ehama and Toru Kengaku and Takuichiro Nakazawa and Hiromi Watanabe},
year = {2009},
doi = {10.1109/JSSC.2009.2014025},
url = {https://doi.org/10.1109/JSSC.2009.2014025},
researchr = {https://researchr.org/publication/IwataMKSIUHNEKN09},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {44},
number = {4},
pages = {1184-1191},
}