System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints

Vikram Iyengar, Krishnendu Chakrabarty. System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints. IEEE Trans. on CAD of Integrated Circuits and Systems, 21(9):1088-1094, 2002. [doi]

Bibliographies