Vikram Iyengar, Krishnendu Chakrabarty. System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints. IEEE Trans. on CAD of Integrated Circuits and Systems, 21(9):1088-1094, 2002. [doi]
@article{IyengarC02:0,
title = {System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints},
author = {Vikram Iyengar and Krishnendu Chakrabarty},
year = {2002},
doi = {10.1109/TCAD.2002.801102},
url = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2002.801102},
tags = {testing, constraints},
researchr = {https://researchr.org/publication/IyengarC02%3A0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {21},
number = {9},
pages = {1088-1094},
}