Predicting system-level area and delay for pipelined and nonpipelined designs

Rajiv Jain, Alice C. Parker, Nohbyung Park. Predicting system-level area and delay for pipelined and nonpipelined designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 11(8):955-965, 1992. [doi]

Authors

Rajiv Jain

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Alice C. Parker

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Nohbyung Park

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