Architecture for Dual-Mode Quadruple Precision Floating Point Adder - researchr publication authors

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Manish Kumar Jaiswal, B. Sharat Chandra Varma, Hayden Kwok-Hay So. Architecture for Dual-Mode Quadruple Precision Floating Point Adder. In 2015 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015. pages 249-254, IEEE Computer Society, 2015. [doi]

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