8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment

Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David Blaauw. 8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017. pages 148-149, IEEE, 2017. [doi]

Authors

Tae-Kwang Jang

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Seokhyeon Jeong

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Dongsuk Jeon

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Kyojin David Choo

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Dennis Sylvester

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David Blaauw

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