Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer. EDT Bandwidth Management in SoC Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 31(12):1894-1907, 2012. [doi]
@article{JanickiKMMRT12, title = {EDT Bandwidth Management in SoC Designs}, author = {Jakub Janicki and Mark Kassab and Grzegorz Mrugalski and Nilanjan Mukherjee and Janusz Rajski and Jerzy Tyszer}, year = {2012}, doi = {10.1109/TCAD.2012.2205385}, url = {http://dx.doi.org/10.1109/TCAD.2012.2205385}, researchr = {https://researchr.org/publication/JanickiKMMRT12}, cites = {0}, citedby = {0}, journal = {IEEE Trans. on CAD of Integrated Circuits and Systems}, volume = {31}, number = {12}, pages = {1894-1907}, }