A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler

Ting-Sheng Jau, Wei-Bin Yang, Yu-lung Lo. A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler. In 13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006. pages 902-905, IEEE, 2006. [doi]

Authors

Ting-Sheng Jau

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Wei-Bin Yang

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Yu-lung Lo

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