A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler

Ting-Sheng Jau, Wei-Bin Yang, Yu-lung Lo. A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler. In 13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006. pages 902-905, IEEE, 2006. [doi]

@inproceedings{JauYL06,
  title = {A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler},
  author = {Ting-Sheng Jau and Wei-Bin Yang and Yu-lung Lo},
  year = {2006},
  doi = {10.1109/ICECS.2006.379935},
  url = {http://dx.doi.org/10.1109/ICECS.2006.379935},
  researchr = {https://researchr.org/publication/JauYL06},
  cites = {0},
  citedby = {0},
  pages = {902-905},
  booktitle = {13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006},
  publisher = {IEEE},
  isbn = {1-4244-0395-2},
}