A low-offset high-speed double-tail dual-rail dynamic latched comparator

HeungJun Jeon, Yong-Bin Kim. A low-offset high-speed double-tail dual-rail dynamic latched comparator. In R. Iris Bahar, Fabrizio Lombardi, David Atienza, Erik Brunvand, editors, Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010. pages 45-48, ACM, 2010. [doi]

Abstract

Abstract is missing.