Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)

Seongwon Jeong, Jinseok Kim 0005, Ayoung Kim, Byungwook Kim, Moonsoo Lee, Jaewon Chang, In Hak Baick, Hanbyul Kang, Younggeun Ji, Sangchul Shin, Sangwoo Pae. Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR). In IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. pages 3, IEEE, 2018. [doi]

@inproceedings{JeongKKKLCBKJSP18,
  title = {Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)},
  author = {Seongwon Jeong and Jinseok Kim 0005 and Ayoung Kim and Byungwook Kim and Moonsoo Lee and Jaewon Chang and In Hak Baick and Hanbyul Kang and Younggeun Ji and Sangchul Shin and Sangwoo Pae},
  year = {2018},
  doi = {10.1109/IRPS.2018.8353653},
  url = {https://doi.org/10.1109/IRPS.2018.8353653},
  researchr = {https://researchr.org/publication/JeongKKKLCBKJSP18},
  cites = {0},
  citedby = {0},
  pages = {3},
  booktitle = {IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-5479-8},
}