A 1.35V 4.3GB/s 1Gb LPDDR2 DRAM with controllable repeater and on-the-fly power-cut scheme for low-power and high-speed mobile application

Bong Hwa Jeong, Jongwon Lee, Yin Jae Lee, Tae Jin Kang, Joo-Hyeon Lee, Duck Hwa Hong, Jae-Hoon Kim, Eun Ryeong Lee, Min Chang Kim, Kyung Ha Lee, Sang Il Park, Jong Ho Son, Sang-Kwon Lee, Seong Nyuh Yoo, Sung Mook Kim, Tae Woo Kwon, Jin-Hong Ahn, Yong Tak Kim. A 1.35V 4.3GB/s 1Gb LPDDR2 DRAM with controllable repeater and on-the-fly power-cut scheme for low-power and high-speed mobile application. In IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009. pages 132-133, IEEE, 2009. [doi]

Abstract

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