Paul G. A. Jespers. Sizing CMOS circuits by means of the gm/ID methodology and a compact model. In Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta, editors, Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008. pages 1, ACM, 2008. [doi]
Abstract is missing.