HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis - researchr publication authors

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Yi-Min Jiang, Han Young Koh, Kwang-Ting Cheng. HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis. In 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA. pages 307-312, IEEE Computer Society, 2001. [doi]

This author has not been identified. Look up 'Yi-Min Jiang' in GoogleThis author has not been identified. Look up 'Han Young Koh' in GoogleThis author has not been identified. Look up 'Kwang-Ting Cheng' in Google

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