Large-scale wire-speed packet classification on FPGAs

Weirong Jiang, Viktor K. Prasanna. Large-scale wire-speed packet classification on FPGAs. In Paul Chow, Peter Y. K. Cheung, editors, Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009. pages 219-228, ACM, 2009. [doi]

@inproceedings{JiangP09,
  title = {Large-scale wire-speed packet classification on FPGAs},
  author = {Weirong Jiang and Viktor K. Prasanna},
  year = {2009},
  doi = {10.1145/1508128.1508162},
  url = {http://doi.acm.org/10.1145/1508128.1508162},
  tags = {classification},
  researchr = {https://researchr.org/publication/JiangP09},
  cites = {0},
  citedby = {0},
  pages = {219-228},
  booktitle = {Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009},
  editor = {Paul Chow and Peter Y. K. Cheung},
  publisher = {ACM},
  isbn = {978-1-60558-410-2},
}