Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors - researchr publication authors

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Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang 0002. Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors. In Patrick Groeneveld, Donatella Sciuto, Soha Hassoun, editors, The 49th Annual Design Automation Conference 2012, DAC '12, San Francisco, CA, USA, June 3-7, 2012. pages 907-912, ACM, 2012. [doi]

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