A 7.68 GHz Fast-Lock Low-Jitter Digital MDLL

Junghoon Jin, Seungjun Kim, Sunguk Choi, Pil-Ho Lee, Sang Jae Rhee, Ki-hwan Choi, Jongsun Kim. A 7.68 GHz Fast-Lock Low-Jitter Digital MDLL. In 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021. pages 311-312, IEEE, 2021. [doi]

Abstract

Abstract is missing.