Jun-Gi Jo, Jinho Noh, Changsik Yoo. A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA. J. Solid-State Circuits, 46(11):2469-2477, 2011. [doi]
Abstract is missing.