High Speed CPU Simulation Using LTU Dynamic Binary Translation

Daniel Jones, Nigel P. Topham. High Speed CPU Simulation Using LTU Dynamic Binary Translation. In André Seznec, Joel S. Emer, Michael F. P. O Boyle, Margaret Martonosi, Theo Ungerer, editors, High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings. Volume 5409 of Lecture Notes in Computer Science, pages 50-64, Springer, 2009. [doi]

Abstract

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