Wilson Jose, Ana Rita Silva, Horácio C. Neto, Mário P. Véstias. Efficient implementation of a single-precision floating-point arithmetic unit on FPGA. In 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014. pages 1-4, IEEE, 2014. [doi]
Abstract is missing.