Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs

Jan Moritz Joseph, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck. Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs. Microprocessors and Microsystems, 48:36-47, 2017. [doi]

Authors

Jan Moritz Joseph

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Christopher Blochwitz

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Alberto García Ortiz

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Thilo Pionteck

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