Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs

Jan Moritz Joseph, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck. Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs. Microprocessors and Microsystems, 48:36-47, 2017. [doi]

Possibly Related Publications

The following publications are possibly variants of this publication: