Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs

Jan Moritz Joseph, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck. Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs. Microprocessors and Microsystems, 48:36-47, 2017. [doi]

@article{JosephBOP17,
  title = {Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs},
  author = {Jan Moritz Joseph and Christopher Blochwitz and Alberto García Ortiz and Thilo Pionteck},
  year = {2017},
  doi = {10.1016/j.micpro.2016.09.011},
  url = {http://dx.doi.org/10.1016/j.micpro.2016.09.011},
  researchr = {https://researchr.org/publication/JosephBOP17},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {48},
  pages = {36-47},
}