Simultaneous switching noise analysis and low bouncing buffer design [CMOS ICs]

Shyh-Jye Jou, Wei-Chung Cheng, Yu-Tao Lin. Simultaneous switching noise analysis and low bouncing buffer design [CMOS ICs]. In Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, CICC 1998, Santa Clara, CA, USA, May 11-14, 1998. pages 545-548, IEEE, 1998. [doi]

Abstract

Abstract is missing.