Min-Rank Conjecture for Log-Depth Circuits - researchr publication bibtex

researchr

You are not signed in
Sign in
Sign up

Stasys Jukna, Georg Schnitger. Min-Rank Conjecture for Log-Depth Circuits. Electronic Colloquium on Computational Complexity (ECCC), 16:8, 2009. [doi]

@article{JuknaS09,
  title = {Min-Rank Conjecture for Log-Depth Circuits},
  author = {Stasys Jukna and Georg Schnitger},
  year = {2009},
  url = {http://eccc.hpi-web.de/report/2009/008},
  researchr = {https://researchr.org/publication/JuknaS09},
  cites = {0},
  citedby = {0},
  journal = {Electronic Colloquium on Computational Complexity (ECCC)},
  volume = {16},
  pages = {8},
}

runs on WebDSL