A 9.4MHz-to-2.4GHz Jitter-Power Reconfigurable Fractional-N Ring PLL for Multi-Standard Applications in 7nm FinFET CMOS Technology - researchr publication authors

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Sangdon Jung, Jaehong Jung, Byungki Han, Seunghyun Oh, Jongwoo Lee. A 9.4MHz-to-2.4GHz Jitter-Power Reconfigurable Fractional-N Ring PLL for Multi-Standard Applications in 7nm FinFET CMOS Technology. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019. pages 87-90, IEEE, 2019. [doi]

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