Sangdon Jung, Jaehong Jung, Byungki Han, Seunghyun Oh, Jongwoo Lee. A 9.4MHz-to-2.4GHz Jitter-Power Reconfigurable Fractional-N Ring PLL for Multi-Standard Applications in 7nm FinFET CMOS Technology. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019. pages 87-90, IEEE, 2019. [doi]
@inproceedings{JungJHOL19,
title = {A 9.4MHz-to-2.4GHz Jitter-Power Reconfigurable Fractional-N Ring PLL for Multi-Standard Applications in 7nm FinFET CMOS Technology},
author = {Sangdon Jung and Jaehong Jung and Byungki Han and Seunghyun Oh and Jongwoo Lee},
year = {2019},
doi = {10.1109/A-SSCC47793.2019.9056931},
url = {https://doi.org/10.1109/A-SSCC47793.2019.9056931},
researchr = {https://researchr.org/publication/JungJHOL19},
cites = {0},
citedby = {0},
pages = {87-90},
booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019},
publisher = {IEEE},
isbn = {978-1-7281-5106-9},
}