Generating RTL Synthesizable Code from Behavioral Testbenches for Hardware-Accelerated Verification

Mohammad Reza Kakoee, Mohammad Riazati, Siamak Mohammadi. Generating RTL Synthesizable Code from Behavioral Testbenches for Hardware-Accelerated Verification. In Luca Fanucci, editor, 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008. pages 714-720, IEEE, 2008. [doi]

Abstract

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