Priyank Kalla, Maciej J. Ciesielski. Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence. In 1999 Design, Automation and Test in Europe (DATE 99), 9-12 March 1999, Munich, Germany. pages 638-642, IEEE Computer Society, 1999. [doi]
@inproceedings{KallaC99,
title = {Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence},
author = {Priyank Kalla and Maciej J. Ciesielski},
year = {1999},
url = {http://csdl.computer.org/comp/proceedings/date/1999/0078/00/00780638abs.htm},
researchr = {https://researchr.org/publication/KallaC99},
cites = {0},
citedby = {0},
pages = {638-642},
booktitle = {1999 Design, Automation and Test in Europe (DATE 99), 9-12 March 1999, Munich, Germany},
publisher = {IEEE Computer Society},
isbn = {0-7695-0078-1},
}