High-level design verification using Taylor Expansion Diagrams: first results

Priyank Kalla, Maciej J. Ciesielski, Emmanuel Boutillon, Eric Martin 0001. High-level design verification using Taylor Expansion Diagrams: first results. In Seventh IEEE International High-Level Design Validation and Test Workshop 2002, Cannes, France, October 27-29, 2002. pages 13-17, IEEE Computer Society, 2002. [doi]

@inproceedings{KallaCB002,
  title = {High-level design verification using Taylor Expansion Diagrams: first results},
  author = {Priyank Kalla and Maciej J. Ciesielski and Emmanuel Boutillon and Eric Martin 0001},
  year = {2002},
  doi = {10.1109/HLDVT.2002.1224421},
  url = {http://doi.ieeecomputersociety.org/10.1109/HLDVT.2002.1224421},
  researchr = {https://researchr.org/publication/KallaCB002},
  cites = {0},
  citedby = {0},
  pages = {13-17},
  booktitle = {Seventh IEEE International High-Level Design Validation and Test Workshop 2002, Cannes, France, October 27-29, 2002},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-7655-2},
}