Anant S. Kamath, Biman Chattopadhyay. A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 69-72, IEEE, 2012. [doi]
@inproceedings{KamathC12-0, title = {A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS}, author = {Anant S. Kamath and Biman Chattopadhyay}, year = {2012}, doi = {10.1109/ISCAS.2012.6272127}, url = {http://dx.doi.org/10.1109/ISCAS.2012.6272127}, researchr = {https://researchr.org/publication/KamathC12-0}, cites = {0}, citedby = {0}, pages = {69-72}, booktitle = {2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012}, publisher = {IEEE}, isbn = {978-1-4673-0218-0}, }