Scheduling of PDE setting and timing tests for post-silicon skew tuning with timing margin: [extended abstract] - researchr publication

researchr

You are not signed in
Sign in
Sign up

Mineo Kaneko. Scheduling of PDE setting and timing tests for post-silicon skew tuning with timing margin: [extended abstract]. In Joseph R. Cavallaro, Tong Zhang 0002, Alex K. Jones, Hai Helen Li, editors, Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014. pages 91-92, ACM, 2014. [doi]

Abstract is missing.

runs on WebDSL