Yi-Chieh Kao, Hung-An Chen, Hsi-Pin Ma. An FPGA-Based High-Frequency Trading System for 10 Gigabit Ethernet with a Latency of 433 ns. In 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022, Hsinchu, Taiwan, April 18-21, 2022. pages 1-4, IEEE, 2022. [doi]
Abstract is missing.