Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sarkar, S. R. Pentakota, Chris Reade. Verification of Scheduling in High-level Synthesis. In 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany. pages 141-146, IEEE Computer Society, 2006. [doi]
Abstract is missing.