Verification of Datapath and Controller Generation Phase in High-Level Synthesis of Digital Circuits - researchr publication

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Chandan Karfa, Dipankar Sarkar, Chitta Mandal. Verification of Datapath and Controller Generation Phase in High-Level Synthesis of Digital Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 29(3):479-492, 2010. [doi]

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