Evaluating architecture and compiler design through static loop analysis - researchr publication authors

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Yuriy Kashnikov, Pablo de Oliveira Castro, Emmanuel Oseret, William Jalby. Evaluating architecture and compiler design through static loop analysis. In International Conference on High Performance Computing & Simulation, HPCS 2013, Helsinki, Finland, July 1-5, 2013. pages 535-544, IEEE, 2013. [doi]

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