Evaluating architecture and compiler design through static loop analysis

Yuriy Kashnikov, Pablo de Oliveira Castro, Emmanuel Oseret, William Jalby. Evaluating architecture and compiler design through static loop analysis. In International Conference on High Performance Computing & Simulation, HPCS 2013, Helsinki, Finland, July 1-5, 2013. pages 535-544, IEEE, 2013. [doi]

Possibly Related Publications

The following publications are possibly variants of this publication: