High Speed Power Efficient Carry Select Adder Design

Raghava Katreepalli, Themistoklis Haniotakis. High Speed Power Efficient Carry Select Adder Design. In 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017. pages 32-37, IEEE, 2017. [doi]

Abstract

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