Akira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto. A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations. In Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1990, Cambridge, MA, USA, 17-19 September, 1990. pages 347-350, IEEE, 1990. [doi]
@inproceedings{KatsunoTKSSG90,
title = {A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations},
author = {Akira Katsuno and Hiromasa Takahashi and Hajime Kubosawa and Tomio Sato and Atsuhiro Suga and Gensuke Goto},
year = {1990},
doi = {10.1109/ICCD.1990.130250},
url = {https://doi.org/10.1109/ICCD.1990.130250},
researchr = {https://researchr.org/publication/KatsunoTKSSG90},
cites = {0},
citedby = {0},
pages = {347-350},
booktitle = {Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1990, Cambridge, MA, USA, 17-19 September, 1990},
publisher = {IEEE},
isbn = {0-8186-2079-X},
}