16- Layer PCB Channel Design with Minimum Crosstalk and Optimization of VIA and TDR Analysis

A. Kavitha, Ch. Sekhararao Kaitepalli, J. N. Swaminathan, Shaik Ahemedali. 16- Layer PCB Channel Design with Minimum Crosstalk and Optimization of VIA and TDR Analysis. J. Electronic Testing, 35(4):497-517, 2019. [doi]

Abstract

Abstract is missing.