Ming-Dou Ker, Wei-Jen Chang. Overview on ESD protection design for mixed-voltage I/O interfaces with high-voltage-tolerant power-rail ESD clamp circuits in low-voltage thin-oxide CMOS technology. Microelectronics Reliability, 47(1):27-35, 2007. [doi]
@article{KerC07,
title = {Overview on ESD protection design for mixed-voltage I/O interfaces with high-voltage-tolerant power-rail ESD clamp circuits in low-voltage thin-oxide CMOS technology},
author = {Ming-Dou Ker and Wei-Jen Chang},
year = {2007},
doi = {10.1016/j.microrel.2006.03.012},
url = {http://dx.doi.org/10.1016/j.microrel.2006.03.012},
tags = {design},
researchr = {https://researchr.org/publication/KerC07},
cites = {0},
citedby = {0},
journal = {Microelectronics Reliability},
volume = {47},
number = {1},
pages = {27-35},
}