The impact of low-holding-voltage issue in high-voltage CMOS technology and the design of latchup-free power-rail ESD clamp circuit for LCD driver ICs

Ming-Dou Ker, Kun-Hsien Lin. The impact of low-holding-voltage issue in high-voltage CMOS technology and the design of latchup-free power-rail ESD clamp circuit for LCD driver ICs. J. Solid-State Circuits, 40(8):1751-1759, 2005. [doi]

@article{KerL05,
  title = {The impact of low-holding-voltage issue in high-voltage CMOS technology and the design of latchup-free power-rail ESD clamp circuit for LCD driver ICs},
  author = {Ming-Dou Ker and Kun-Hsien Lin},
  year = {2005},
  doi = {10.1109/JSSC.2005.852046},
  url = {https://doi.org/10.1109/JSSC.2005.852046},
  researchr = {https://researchr.org/publication/KerL05},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {40},
  number = {8},
  pages = {1751-1759},
}