Investigation and Design of On-Chip Power-Rail ESD Clamp Circuits Without Suffering Latchup-Like Failure During System-Level ESD Test

Ming-Dou Ker, Cheng-Cheng Yen. Investigation and Design of On-Chip Power-Rail ESD Clamp Circuits Without Suffering Latchup-Like Failure During System-Level ESD Test. J. Solid-State Circuits, 43(11):2533-2545, 2008. [doi]

Abstract

Abstract is missing.